Project Logs

Collapse

• OSC Dev V006 Rev B Bring-Up - One Trace Cut for a Fresh-Chip Bootstrap

  Aaron Qian • 2 hours ago • 0 comments

  When the first Rev B board came back from PCBWay, I hooked up the WCH-LinkE, fired up the debugger, and tried to connect. The debugger reported no target at all. The board was clearly powered (3.3 V rail LED on, no heat, no smoke), and the LinkE itself was alive, but whatever was on the other end of the SWD lines wasn't answering. Unlike Rev A where I failed my way to debug success, I didn't actually have to probe to know what was going on this time. It immediately hit me that the Rev B schematic puts nRST and OPN2 on the same physical pin, and is tied to ground. This means the chip is held in reset forever, no way of changing nRST to GPIO via LinkE...

  If you're new here, OpenServoCore is my effort to turn cheap MG90S-class servos into networked smart actuators with sensor feedback, cascade control, and a DYNAMIXEL-style TTL bus. The CH32V006 dev board is the firmware development platform for this project. Rev B is the second revision, announced in April and fabricated and assembled by PCBWay as a sponsored run.

  TL;DR

  • Symptom: fresh Rev B board doesn't enumerate to the debugger. Chip held in reset.
  • Cause: nRST and OPN2 share a pin. Default function on a virgin chip is nRST. OPN2 is wired to ISNS-, the negative tap of the low-side shunt, which sits near GND. So the pin reads low and the MCU never leaves reset.
  • Workaround for the five sponsored boards: scrape off the solder mask to reveal the ISNS- copper trace, cut the trace, flash the USER option byte to remap nRST → GPIO, patch the trace back with a 0Ω 0805 resistor.
  • In-rev fix: added an SB1 solder bridge footprint on that segment. Close it after the option byte is flashed.
  • Status: Rev B is validated. Published files include the solder bridge patch.

  The Rev A Story Behind This

  Rev A had ISNS- routed to OPN0, which the V006's silicon refused to use as a differential negative input. The OPA fell back to single-ended with its negative tied internally to GND — effectively neutering the Kelvin sense traces and making bidirectional current sensing impossible. I wrote up the rest of the Rev B delta back in April when the design was done but not yet built. The fix was to move ISNS- to OPN2, which is a valid OPA negative input but happens to share its package pin with nRST. The trade was: lose hardware reset, gain proper differential current sense. The plan was to disable nRST at provisioning by programming the USER option byte.

  That plan itself is fine, it just has a chicken-and-egg problem on a fresh chip that I totally didn't think about.

  Powering On

  The boards arrived in mid-May — five PCBA units, sponsored by PCBWay as a continuation of the Rev A run.

  Five PCBA units, ESD-bagged, fresh from PCBWay.

  Build and assembly quality was clean across all five, with no orientation surprises and no solder issues, and the pre-fab manufacturability review didn't catch anything this time around (Rev A had a pad-clearance call-out before fab; Rev B was quiet). When I plugged in USB-C, the 3.3 V rail LED came up immediately, and the silkscreen was correct everywhere I looked. From the outside everything looked right.

  Then I went to flash firmware, which is where I ran into the bootstrap problem I described above. To free up the shared pin for OPA use, the USER option byte has to be reprogrammed to set nRST → GPIO, and the only way to do that is through the WCH-LinkE. But on a fresh chip whose nRST pin is being held low through the ISNS- path, the LinkE has nothing to talk to. The chip is held in reset by the very analog front end it's supposed to be sensing, and there's no way for me to reach it from the outside to fix the reason it's stuck.

  Cut, Flash, Patch

  The way out is to break the path between the MCU pin and ISNS- long enough to program the option byte. With OPN2 / nRST floating, the MCU's own internal pull-up brings the line high, the chip releases reset, the WCH-LinkE can flash the USER option byte to nRST → GPIO. After that, the pin is no longer a reset input, so reconnecting...

  Read more »

• Dev Board Rev B Is Ready

  Aaron Qian • 05/02/2026 at 06:16 • 0 comments

  TL;DR — Rev B is the respin of the OSC CH32V006 dev board. Fixes the three Rev A defects (VDD/VCC swap, UART RX contention, OPA pin mapping that broke differential current sensing), adds a PWM servo header for system-ID work, dual-mode encoder input, an external NTC connector, and the project's first silkscreen logo.

  Status: designed, not fabricated. I've reviewed Rev B carefully and don't expect another Rev A-scale surprise. But the hardware hasn't been built or validated yet. If you want to fab one yourself, wait for the bringup post. Or fab it at your own risk knowing the design is unproven.

  What's fixed (from Rev A)

  • VDD / VCC swap — the Rev A bug, the one that caused the MCU surgery saga on first-spin bringup. A fresh chip will now power on without magnet wire.
  • UART RX contention — Rev A's half-duplex TTL buffer was actively driving RX even with TX_EN low; full debug story is here. Rev B adds JP2, a jumper that routes the MCU's RX either through the TTL buffer (DXL mode) or floats it (LinkE plain-UART mode). Recovery-path peripherals shouldn't depend on firmware to function.
  • Battery polarity, silkscreen labels — boring fixes. Now correct.
  • V006 OPA pin mapping — the big one, see below.

  What's new

  Differential current sensing, actually differential this time. Rev A's ISNS- was on OPN0, which isn't a valid negative input for the V006's differential opamp; the silicon was effectively single-ended against GND, ignoring the Kelvin sense traces and only seeing one direction of current. Rev B moves ISNS- to OPN2, which costs the reset pin (USER option byte disables reset-on-NRST at provisioning) but recovers true differential measurement and bidirectional visibility — back-EMF, regen, freewheeling current through the diodes during PWM off-time. A correct PI current loop needs the signed integral of that signal, not a clipped one.

  Hardware overcurrent / fault protection. The OPA output also feeds CMP2, the V006's internal comparator. Configure it to trip on overcurrent and PWM stops without firmware involvement. Even if the main loop is hung, the trip still fires through silicon. The dev board uses a 10 mΩ shunt sized so the trip catches motor shorts without false-firing on normal stall current.

  External NTC connector + select jumper. Onboard sensor stays for ambient board temp; J6 + JP1 add an external NTC for motor-winding temperature during stress / characterization runs.

  PWM servo header (J3). Standard 1×3 hobby servo header driven from IN1. Lets the dev board double as a system-ID rig for stock-servo characterization — positional accuracy, slew rate, error percentage on repeated sweep / return-to-center.

  Dual-mode encoder input (J8). ENCA / ENCB pin-mapped to both TIM2 (hardware quadrature, no MCU overhead) and the ADC (analog ratiometric encoders, à la Adam Bäckström's ServoProject sin/cos stack). Same connector, two acquisition modes, picked in firmware. Didn't want to commit the dev board to one encoder strategy.

  VSYS direct sensing. Separate divider — no more inferring system voltage from motor-terminal sense, which broke when the motor was idle.

  WCH-LinkE 5V as a fourth power input. Since nRST is gone, the LinkE's +5V line is now repurposed via SS54 into the existing OR network alongside USB-C, the JST battery, and the screw terminal. LinkE alone can power the board during development.

  First silkscreen logo for the project. Designed this week — two-tone (white silk for the OSC letters, exposed gold copper for the finer decorative symbols). Small QR code on the silk pointing to the board docs.

  Read the full post

  Schematic walkthrough, pin-map decisions, the math behind the CMP2 trip thresholds for both the dev board and the future SG90 swap board, and an embedded 3D model:

  → OSC Dev V006 Rev B Is Ready on aaronqian.com

  KiCad project: open-servo-core/hardware/boards/osc-dev-v006. Full revision delta in the CHANGELOG.

  Hardware sponsorship for the dev board comes from PCBWay.

View all 2 project logs