Product Overview
The P89V660/662/664 are 80C51 microcontrollers with 16 kB/32 kB/64 kB flash and 512 B/1 kB/2 kB of data RAM. These devices are designed to be drop-in and software compatible replacements for the P89C660/662/664 devices. Both the In-System Programming (ISP) and In-Application Programming (IAP) boot codes are upward compatible.
Additional features of the P89V660/662/664 devices when compared to the P89C660/662/664 devices are the inclusion of a secondary 100 kHz byte-wide I2C-bus interface, an SPI interface, four addition I/O pins (Port 4), and the ability to erase code memory in 128-byte pages.
The IAP capability combined with the 128-byte page size allows for efficient use of the code memory for non-volatile data storage.
This blog will introduce P89V664FA systematically from its features, pinout to its specifications, applications, also including P89V664FA datasheet and so much more.
P89V664FA Features
Principal features
- n Dual 100 kHz byte-wide I2C-bus interfaces
- n 128-byte page erase for efficient use of code memory as non-volatile data storage
- n 0 MHz to 40 MHz operating frequency in 12x mode, 20 MHz in 6x mode
- n 16 kB/32 kB/64 kB of on-chip flash user code memory with ISP and IAP
- n 512 B/1 kB/2 kB RAM
- n SPI (Serial Peripheral Interface) and enhanced UART
- n PCA (Programmable Counter Array) with PWM and Capture/Compare functions
- n Three 16-bit timers/counters
- n Four 8-bit I/O ports, one 4-bit I/O port
- n WatchDog Timer (WDT)
- n 30 ms page erase, 150 ms block erase
- n Support for 6-clock (default) or 12-clock mode selection via ISP or parallel programmer
- n PLCC44 and TQFP44 packages
- n Ten interrupt sources with four priority levels
- n Second DPTR register
- n Low EMI mode (ALE inhibit)
- n Power-down mode with external interrupt wake-up
- n Idle mode
Additional features
P89V664FA Pinout
The following figure is the diagram of P89V664FA pinout.
Discussions
Become a Hackaday.io Member
Create an account to leave a comment. Already have an account? Log In.