I think I've completed the (Tilelink) IFU design.  I emphasize "think", because without the rest of the processor being built, it's not yet possible to know if I'm truly done or not. My next major step is to work on the IXU design.  But, before that works, I would like to make an intermediate design which couples the IFU with the ROMA core (thus letting me read from flash ROM) and passing the lower 8-bits of each "instruction" fetched out to a set of LEDs.  This will provide visual confirmation that everything is working.

I'm kind of wondering if creating a Wishbone B4 pipelined IFU has value as well.