I've completed enough of the KCP53000 RISC-V CPU's data sheet that I'm satisfied with an announcement here. Take a look and let me know what you think!

I wrote it using Gitbook to be a self-standing document; however, its contents will eventually make its way into the Kestrel-3 User's Guide as well.

Some things I want to work on eventually though:

• I want to convert the processor from an M-mode only CPU to a U-mode only CPU. Revision 1.9 of the privileged ISA spec allows this (even if not overtly). Remember that I started Polaris and the E Emulator back when v1.7 of the privilege spec was available, when a U-mode only implementation simply wasn't possible (and still be standards compliant). I've created a ticket to track this on Github.
• I'd like to augment the data sheet with an example Verilog application of the processor, to show how it'd be used in a real design. I've also created a ticket for this issue as well.

But, for now, it's complete "enough". Let me know what you think!