Samuel A. Falvo IIDon't worry; I still want the RISC-V ISA. But when working with such a tiny FPGA family as the iCE40 line-up, I might have to switch to software-emulation to get what I want.
I was curious today, and synthesized a bunch of cores to see what their resource utilizations are like.
| SRAM Interface | 130 LUTs |
| Serial Interface Adapter | 710 LUTs |
| KCP53000 CPU + 16-bit bus bridges | 5500 LUTs |
| S16X4A CPU (Kestrel-2) | 510 LUTs |
If I build out a KCP53000-based computer design, I'll not have any room left on the HX8K FPGA to implement even a tiny boot ROM with. I would need to somehow implement a DMA engine in under 1000 LUTs which simultaneously works with the SIA's quirks as well as serving as an IPL processor for the computer. Not only that, but the computer would have access to exactly one I/O channel.
If I were to somehow expand the S16X4A to 64-bits, dumb expansion and synthesis run gives me a figure of 1500 LUTs. RAM + SIA + S64X CPU is still small enough to let me synthesize an appreciable on-chip ROM for bootstrapping purposes.
Switching to a 64-bit wide variant of the S16X4A CPU and relying on software emulation to provide RISC-V compatibility might be the way forward, at least for these smaller FPGAs.
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Or not. My S64X7 prototype comes in at 5450 LUTs -- not far from the 5500 LUTs of the KCP53000 that I made. If I leave off the Furcula-to-Wishbone bridges and 64b-16b reducers, the KCP53000 undercuts the MISC core at 3900 LUTs.
In my "off time," I'm going to try and make another RISC-V 64-bit engine, this time with a Wishbone B.4 native interface, and will try to compare how big it ends up being.
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I only have xilinx fpgas, so I do not know much about Lattice FPGAs. Are there any larger ones? Would you consider a larger FPGA?
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I'm using the largest Lattice makes in the iCE40 series. I do have access to larger units as well, but they're repressively burdensome to program for. My Xilinx-based Nexys-2 has (so far as I can tell) a quasi-faulty external RAM chip (it appears to work with their BIST bitstream, but **nothing** I develop works with the chip at all), and while I do have a Terasic DE-1 board that was donated to me, I have so far been utterly unable to successfully even *download* (much less use, get a license for, etc.) their programming environment.
I'm sticking with iCE40-based systems because tools are open source, and consequently, they "just work."
If you're interested in reading through my log history, you'll find a sampling of some of the issues I've run into.
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