Hi there, since my last post I've been waiting for the new batch of memory chips. EEPROMS this time for convenience sake. I got them today, burned the new firmware (the one with bank switching routine surrounded with DI/EI), installed it, but unfortunately it's still glitching. I've (CAREFULLY) hooked up a logic analyzer and gave it a go.
No magic smoke this time :)
I've found the reason why it sometimes fails. Look at this pic first:
You can see, that D0 goes high, then after 6us CLK goes low and after 5us more it goes back high. This is when '374 does the switching (see transition @Q0 and Q1). So far, so good. But this is how it looks when it glitches:
You can clearly see that the clock pulse is way longer than before and the rising edge misses whatever has been set ad D0..D2 inputs. Why? Well, normally I would say, it's an interrupt. But this code should be interrupt safe now!
Yeeeah, should is a good word. Take a look at my 'smart' code again:
.BSHND: EQI E, 22H ; ID == 22? (1-4 ,select bank)
JR .NOBS ; nope, skip
LTI D, 04H
JR .MORE
.LESS: ANIW 82H, 3FH ; unset 6th bit @ $2682
JR .BS ; that's all, we can set the bank number
.MORE: ORIW 82H, 40H ; set 6th bit @ $2682
ANIW 81H, 7FH ; unset 7th bit @ $2681
DI ; I wonder if it helps...
.BS: CALL .BANKSWITCH ; call bank switch routine
EI
JR .11E1H ; and skip KLM-654 transmission part
It will clearly only work if you go through the .MORE branch. Going through .LESS causes the jump to .BS label which skips DI instruction! D'oh.... OK, let's move the .BS label to the previous line, build the binary again, burn it and test it. Se you later :)
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Great stuff... looking forward to test it :)
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