Just a quick update

I am still actively working on this project, and I found another alternative to the Vishay part, the pin compatible MAXIM DG403. MAXIM were also kind enough to release libraries for use in my CAD software of choice. As soon as finals are over I will take some time and get the ALU pcb designed, etched, and populated :)

Thanks everyone for your suggestions and support! :)

Cheers!

~ThunderSqueak

Discussions

John Sully wrote 12/13/2014 at 03:55

I've started my own ternary computer project. I was designing a NAND gate for this purpose but your drawings look *a lot* simpler than my designs. I haven't modeled your drawings but it seems they don't have a stable center state, which I had assumed would be important for stability. Have you gotten to the point of wiring a few test gates together?

Are you sure? yes | no

ThunderSqueak wrote 12/13/2014 at 07:16

Yep, I left out some resistors in the drawing, I should update those ^^ Just busy with finals right now :)

Are you sure? yes | no

John Sully wrote 12/14/2014 at 02:12

How far are you on the instruction set design? If we keep ours compatible it could allow for some interesting collab on the software front.

It looks like your going with a register design. I was planning on going with a memory to memory approach to save on hardware. (Maybe with a single accumulator register)

I'm actually taking a slightly different approach than you making an emulated machine first. I ultimately want a C like language with ternary support bolted on.

Are you sure? yes | no

ThunderSqueak wrote 12/14/2014 at 04:23

Mostly for the instruction set, which I mused over in a previous log, I was just keeping it very basic. I am more of a hardware person, and I like to experiment to see what is possible. Sometimes I find quirks that I exploit to get an effect that are not emulated in software properly.

I did consider trying to construct it in my FPGA dev kit. I am always open to ideas :)

Are you sure? yes | no

John Sully wrote 12/15/2014 at 08:56

I spent some time today on my design. I've got a quick and dirty emulator and assembler setup. I put some info up on a project page: https://hackaday.io/project/3628-ternac2
I think it should be relatively sparse on hardware but I did add a stack and index register which aren't strictly necessary. A minimal machine could be made without them.

If your game it would be good to collaborate. I feel like you're vastly more qualified on the hardware side.

Are you sure? yes | no

Dom wrote 12/16/2014 at 03:57

I was thinking the same in regards of testing it virtually.

Don't quote me on it, but someone somewhere sometime might try modeling the basic gates in VDHL. Just the sim alone should be exiting without doing synth o̶n̶ for a FPGA.

If someone's adept with this stuff, what's the opinion of using std_ulogic for such an application. 2/2 PDFs I found off the cuff on that topic seem to use it. Sure it has all the necessary states to build a base3 system, but I'd rather define a dedicated enum for this which can represent a 2-bit value for example.

Are you sure? yes | no

Some of the parts are received :D

Discussions

Become a Hackaday.io Member