The CPU consists mainly of:
Memory The memory contains the Program, Data and Address Information, which is decoded and processed by the ALU, Registers or Loop Device
Registers(rX) "Working Memory" of the CPU, quick load and save of data for ALU or Loop Device r0 is straight connected to the first input of the ALU, r31 is connected to the Loop Device
ALU The ALU processes arithmetical and logical instructions. The first input is straight wired to r0 the second input can be chosen(r0 to r31). The result of the ALU operation is returned to a register.
Loop Device The Loop Device controls the Program Execution and is responsible for Comparative Jumps(Alternate Address) in Memory It has a counter for counting iterations of a loop.
The Instructions of the CPU are:
LOAD Load Data from Memory to specified Register
MOVE Move Data from Register A to Register B
EN_EXT enable external Input to Register A
LD_RES reset the counter in the Loop-Device
LD_ACT activate the counter in the Loop-Device (Loop-Device =+ 1)
LD_TGL switch between compare and count mode
CMP_GR jumps if r31 is greater than Register A
CMP_LE jumps if r31 is less than Register A
CMP_EQ jumps if r31 is equal Register A
HLT halts the CPU
EN_PRGM enables programming mode
INV inverts r0 and stores result in Register A
OR "or"s r0 and Register A and stores the result in Register B
XOR "xor"s r0 and Register A and stores the result in Register B
AND "or"s r0 and Register A and stores the result in Register B
ADD adds r0 and Register A and stores the result in Register B
SUB subtracts Register A from r0 and stores the result in Register B
0 load 0 0 5 1 1 load 1 0 3 2 2 add 1 2 0 3 3 hlt 0 0 0 4 4 hlt 0 0 0 5
this program adds 5(r0) and 3(r1) together and stores it in r3
the downloadable files are on github.com/jfassl/smlCPU
If your looking to write a simple but working assembler you may want to look at Sandro Maffiodo "OI" webpage (http://www.assezeta.com/sandromaffiodo/oi/), he has a simple assembler for download. It basically does three things:
1 tokenise (and remove comments)
2 resolve address/data references
3 emit/export the result
Although it is for SUBLEQ, the assembler is not actually language specific. I used it as a base for my assembler (but with more functions).
Your instruction set is similar to the PDP-8:
000 – AND – AND the memory operand with AC.
001 – TAD – Two's complement ADd the memory operand to
010 – ISZ – Increment the memory operand and Skip next instruction if result is Zero.
011 – DCA – Deposit AC into the memory operand and Clear AC.
100 – JMS – JuMp to Subroutine
101 – JMP – JuMP.
110 – IOT – Input/Output Transfer
111 – OPR – microcoded OPeRations
If you want an assembler for the PDP-8 look here:
http://homepage.divms.uiowa.edu/~jones/pdp8/index.html
Regards AlanX