(see updates at the bottom)

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I seem to have solved the problem of cascading the latest flipflops, using better decoupling (and some diodes ?). Here's the new circuit :

For the "fast" parts, a pull-down resistor would be required on the base of the pass transistors, to evacuate the base charges and "cut hard".

There is a better Power On Reset as well, and this system only uses 6 transistors because there is no need to invert the feedback data (just use an inverted value).

Then the challenge is to properly sequence the pulses to the pass transistors.

The question here is not to control a master and a slave latch, but a series of consecutive latches ! so there are as many pulses as there are latches. Here I focus on the "slow" part (< 1Hz update) with a string of one-shot pulsers :

I have really NO IDEA why the last stage emits multiple pulses... The mysteries of Falstad...

But the principle seems to be realistic : each bit of the shift register uses 2 T for the FF, 1T for the pass transistor and another for the pulse/delay. It's far from perfectly working but there is hope that each bit uses only 4 transistors. I might add some diodes to create a charge pump or something like that...

The "fast" circuits might need something more elaborate but at least I might have reduced the parts count for the H:M:S circuits ! (5+3+5+3+5+3)×4 (+ some control stuff) amounts to about a hundred transistors of the same polarity.

I'll try to make it work, then move to the faster parts : I have found a gorgeous vintage resonator at 2K5Hz !

That removes some pressure on the divider's design...

Update : That might work but the simulator is losing its sanity...

Sometime it wants to find crazy negative voltages at the collectors of the PNPs.  I'll have to test it on the bench but it looks promising.
I must also find a way to "shape" the pulses because the "decay" is not very clean. But i'm getting closer to my goal :-)

Cost : 1 PNP + 1 NPN (so it's the same when the polarity is reversed), overall : 5 transistors per bit of a shift register. For a whole display : that's about 120 + 6 transistors... This also facilitates the setting of the time because each shift register can receive a pulse, that could be from a button, and it's inherently debounced.

Stay tuned !

The page shows various enhancements to the system. I'll have to test it to improve my sequencer ! However if this trick works for 2 transistors, I wonder if/how it can work for more...