The assembly definition for the TIS-100 has several instructions that contain too much information for a single 8-bit instruction. There are two solutions that seem plausible to me: extend the instruction set so that combinations of Source/Destinations are encoded, or split the single problematic assembly instruction into 2 8-bit instructions. The second solution is more elegant, because the MOV command, which takes two arguments, also USUALLY takes two ticks (unless we're moving to ACC).

MOV <SRC>, <DEST> will be translated into byte-code as three discrete instructions for the Emu:

MOVTOACC <SRC> --------- OPCODE: 0000 | SRC

MOVTOTEMP <SRC> ------- OPCODE: 0001 | SRC

MOVFROMTEMP <DEST> - OPCODE: 0010 | DEST

The second instruction that is problematic for maintaining an 8 bit instruction width is any instruction that can use VAL or a LABEL instead of a register. Since both VAL and LABEL are <INT> types in the system, it would introduce a variable-width instruction set to have them embedded with the instruction. So, instead of embedding VAL or LABEL, we will instead replace the embedded val with a pointer to an array where they are stored. Since we have 4 bits -- we will be limited to 16 aliases for both LABEL and VAL per core, per program.

int[16] Label - contains the JMP values.

int[16] Val - contains the INT values defined in the program.

Using these two tricks, we can preserve an 8-bit instruction width which will make program execution smoother than a variable-width instruction set. It will also allow us to compute space better at compile time. (Apologies to Michael Covington, I still think this is a legitimate use of the word compile.)