Hello again! :-)

Well a few things have happened since my last update. Since that time, I ended up having two second-round prototypes built: one with 10/100 Ethernet and another with Gigabit Ethernet. Pictured below is the Gigabit Ethernet version (with and without user accessory modules plugged in):

Ethernet tests: This one was a pleasant surprise - wasn't expecting my Gigabit variant to work (was still happy to release the 10/100 variant if it did not work..), but work it did! :-D Gonna do some more testing on it, but I have decided to upgrade the spec. to include it in the final board..

CSI port testing: Didn't go so well.. After finally getting around to diving into this in a major way, I discovered my solution to be unsatisfactory due to problems with shared i/o pins for csi and parallel camera support :-/ Therefore, I decided to delete the CSI port and instead focus on parallel CMOS camera module functionality (but with the possibility for CSI support via 'SLVS' configuration of suitable GPIO pins)..

Deleting the CSI header did free up more user GPIO pins (which are always welcome.. :-), so I added an extra single-row header strip above GPIO-B to access the extra GPIO (see below):

This now leaves parallel CMOS camera and some GPIO-related tests to carry out. To be continued.. thanks for reading! :-)