A 16-bit CPU in Logisim

After reading Yann Guidon's notes about ALU design and reading Warren Toomey's ALU tutorial here: http://www.csc.villanova.edu/~mdamian/Past/csc2400fa13/assign/ALU.html

I took those ideas and I am testing this in my current CPU layout in Logisim.

The add/subtract unit is how Yann described, using an adder's Carry In and a XOR gate to do subtraction:

ADDENDUM:

OK, briefly about the ALU.   I was starting to get too obsessed and distracted with it, I wanted more functions so I've kind of compromised:

But, importantly it IS operationally compatible with the optimised one I had.  So if I want to do the ALU at a lower level, the control line is still there to do the combined Add/Subtract circuit with the XOR.  Also it doesn't affect any the instruction set or internal microcoding.

First I'd like to thank Yann Guidon's advice from his Processor Design Principles (PDP).

So this is the Phoenix, the Ph-16.  A wholly 16-bit system with 16 registers and 64K of RAM.  This is at the highly experimental/research stage, I've come up with a basic layout in Logisim.

Ignore the lower left, it's not connected. It will eventually be the instruction decoder and the 4K ROM will hold the 12-bit microcode, I will look at hardwiring it or doing it with another project, but microcode is just easier for me to fix.   But I did follow Yann Guidon's advice of having 16 registers for a 16 bit machine and they can point to the whole 64K.

The top left is the keyboard and top right is the TTY output, the big multiplexor allows crude channels for other devices, currently. INP and OUT instructions will input/output to/from a given register.

At present I'm playing with the control lines, figuring out what I can get it to do, working out the microcode, instruction set etc.