As antares slowly progresses toward the next planned release, I decided to post some info on what to expect in the next release, focusing on stuff that will allow your code to be truly portable along a wide set of architectures: 

earlyconsole - A way to do early (before interrupts are even enabled) debugging with zero initalization. You just set in menuconfig what serial/softserial/etc. interface you want to use, and use printk(), no matter what architecture you are on. Or disable it and antares will strip all the printk's and reduce the code size. It already there and working in master, so you can check it out already today.

console - A proper 'console' subsystem, that will take care of printk's in later stages. It will feature a simple API and glue code to work with newlib, avr-libc, whatsoever. 

atomics - Cross-mcu macros for atomic operations have already been added for AVR and STM32, and will soon be there for all other architectures. 

rf24 - The nrf24l01 library has been totally refactored in the past month and now reminds very little of what maniacbug's arduino library looked like. Besides a pure C port, size optimisations and a ton of fixes it now features:   

* Major size and memory usage optimizations

* 'bulk' transfer mode that uses nrf24l01 hardware TX FIFO as a buffer, delivering maximum possible transfer rate. 

* Retransfer without the need to transfer the payload to nrf24 again (No more duplicate packets on RX side)

* A lot of other bugfixes and speed improvements

Some things will be polished over time, as a testsuite arrives, but it is already there and usable in master

spisd - SD-over-SPI driver. Now with optional CRC support! Already available in master.

Improved pic32 support - pic32 and their xc32 compiler (which is actually gcc for mips with... *surprise* a license manager) are a major pain in the ass. 8051 is the only thing that's worse, due to sdcc not supporting the __attribute__(("section")) magic required by ANTARES_INIT_LOW/HIGH macro magic. I hope to get the ld script generation ready ASAP (So far we DO need a ld script if we want to build a project for avrdude-compatible bootloaders, as seen in chipkit uno/max)

batch build and config inheritance - The hard part is to make it easy to use. The idea is to allow you to batch-build several configurations of your project at once. This 

STM32 USB Stack - webconn started some experiments with STM32 USB stack. Since ST's code for that is way beyond garbage we want to create a portable usb device stack that will feature vusb compatibility layer and will be portable (stm32/pic32/others). We're not sure we can make it into the next release, since USB Specs are a very nice example of what 'over-engineering' is. But we're working on that!

FPGA target  - parts of my Ph.D. work is coming in antares. In other words, soon you will be able to use antares to manage an FPGA target, run tests, compile VPI if needed. Yes, and you'll have all the fancy kconfig stuff available for verilog HDL! This target will be soon available, but still heavily experimental and mostly targets Xilinx FPGAs and xst for synthesis and iverilog for simulation. 

Stay tuned! 

P.S. If you want me to post/explain some details about antares, or maybe make a screencast explainint things you didn't get from the first read - feel free to write in the comments.