Updated architecture & instruction set

In the past weeks I have prototyped small parts of the computer, thought things over and realized that I had to make a few adjustments to the architecture and instruction set.

Let me start with the progress that was made with the circuit diagrams. The following diagrams have been completed and some of them are tested:

Clock [tested]
Program counter
A, B, C, D & Flags register [tested]
ALU [partially tested in Logisim]

The following changes have been made to the architecture:

The X & Y registers have been renamed to C & D, nothing shocking here.
The ALU now has it's own internal accumulator register.
Input for the ALU can now come from the A, C & D register (and not just fixed from the A register). The second operand still comes from B.
Two outputs are now accounted for: decimal display (output 1) and serial (output 2)

The instruction set has a few new and updated instructions:

MOV [A,B,X,Y] [A,B,X,Y]	Copy register N2 to register N1
MVI [A,B,X,Y] #value	Copy immediate value to register N
LD [A,B,X,Y] $address	Load register N with value at memory address
ST [A,B,X,Y] $address	Store register N value at memory address
ADD [A, X, Y]	N + B → N
ADC [A, X, Y]	N + B + 1 → N
SUB [A, X, Y]	N - B → N
SBC [A, X, Y]	N - B - 1 → N
AND [A, X, Y]	N & B → N
OR [A, X, Y]	N \| B → N
XOR [A, X, Y]	N ⊕ B → N
NOT [A, X, Y]	!N → N
INC [A, X, Y]	N + 1 → N
DEC [A, X, Y]	N - 1 → N
SHL [A, X, Y]	Shift all bits in register N to the left
SHR [A, X, Y]	Shift all bits in register N to the right
RAL [A, X, Y]	Rotate all bits in register N to the left
RAR [A, X, Y]	Rotate all bits in register N to the right
CMP [A, X, Y]	Compare register N to register B
JMP $address	Jump to memory address
JZ $address	Jump to memory address if zero flag is set
JNZ $address	Jump to memory address if zero flag is not set
JC $address	Jump to memory address if carry flag is set
JNC $address	Jump to memory address if carry flag is not set
JEQ $address	Jump to memory address if N = B
JLT $address	Jump to memory address if N < B
JGT $address	Jump to memory address if N > B
CALL $address	Jump to subroutine at memory address
RET	Return from subroutine
NOP	Do nothing
HLT	Halt execution
IN	Load data from input into register A (needs to be worked out)
OUT [1, 2] [A, B, X, Y]	Output data from register N2 on output N1 (1 = decimal display, 2 = serial output)

I'm currently waiting on more breadboards coming in for prototyping and slowly working out all the circuit diagrams in the meantime.

More updates coming soon!

Instruction set

Back after hibernation

Discussions

Become a Hackaday.io Member