So, it appears that I stuffed up the routing of the signals into the ATTiny816 on my initial design... time to re-do it, right this time. Here's a quick overview of what I need to connect

• Clock input from the CAN interface
• Reset/programming line
• SPI (CS, MISO, MOSI, and SCLK) to the CAN interface
• Two complementary PWM outputs to the motor
• A, B, and Z lines from the encoder
• One analog input from the motor
• Interrupt line from the CAN interface
• Reset line to CAN interface
• One enable line to the motor

Forced Allocations

Three of these can only go to particular pins.

• The reset/programming line is PA0 (pin 19). One of the advantages of the ATTiny 816 is that it is designed to be programmed and debugged via the reset line alone; this makes the programming header much more compact, since the rest of the SPI interface does not need to be connected as it is with earlier AVR parts.
• The clock input must go to PA3 (pin 2)
• There are two options for SPI on this part, but the default option (PA1-4) overlaps the clock input, so we must use the other option, which is PC0-3, or pins 15-18.

Timer/Counter Allocations

There are three functions in this design that require timer/counter services (timer interrupts, PWM, and encoder input), and only three timer/counters on the chip. These timer/counters are connected to a fairly limited set of pins. 

Allocating the PWM is simple, because Timer/Counter D has specific functions for generating complementary PWM signals with configurable deadband and other features particularly useful for controlling motors. It has four output pins -- PA4, PA5, PC0, and PC1. Since PC0 and PC1 are already allocated to the SPI, PA4 & PA5 are allocated to PWM.

The encoder is a bit trickier, because I want to count both the rising and falling edges of phases A & B of the encoder in order to quadruple the number of counts per revolution. The timer/counter peripherals are only able to count on a single channel. Luckily, the ATTiny816 provides configurable custom logic (CCL) to enable me to get around this limitation. The XOR of phase A & B will transition on every edge, and the CCL provides the ability to do this. Unfortunately, there are only two available CCL input pins still available, PA1 & PA2, so they are allocated to encoder phases A & B. Since only Timer/Counter B offers a frequency measurement mode, the encoder is allocated to Timer/Counter B.

This leaves Timer/Counter A to generate the timer interrupts that drive the control loops

Other Allocations

The analog input from the motor must go into one of the analog pins, which are PA0-7, PB0-1, and PB4-5 on the '816. In order to limit the amount of re-routing, we'll allocate PA6 to motor current feedback.

Phase Z of the encoder fires once per revolution to provide a more absolute position signal. One of the nice features of the '816 is that any pin can be used as an interrupt, so we'll leave it where it is (PB3)

The motor enable line can go anywhere, so we'll move it the shortest distance available, to PA7.

The CAN reset and interrupt lines can go anywhere, so we'll allocate them to PB0 and PB1.

All of these allocations are subject to change for routing convenience. Here's a handy table: