There's a new archive and it's amazing !

A3Ptiles_v2pre20190813.tgz

.

Where do I start ...

So now it has all the DFx gates (64 of them !), all the logic gates (1, 2 and 3-inputs macros) and and... oh well, POWERFUL features to probe and analyse a circuit...

You get BOTH the "fast" (simple) gates and the "trace" versions, and you can select which gate will be logged. Either use a "VHDL configuration" or change the source code to affect an architecture to selected gates !

The "fast" cells are just like the previous version. Fast and simple.

The "trace" cells have the same function BUT also support multi-values signals ! The '0'/'1' levels are the basic "binary" system, but if at least one output is 'L' or 'H', then the output will adopt the 'L'/'H' levels ! And any other input value will be copied to the output and propagated to the rest of the circuit.

All the cells (except for now the DFF) work with a lookup table and the testbench can alter one bit of one the lookup table.

• In "alter" mode, the selected bit is flipped and the selected gate's function is changed. This is useful to verify that your BIST or test vector can catch ALL possible faults (not just stuck or broken wires).
• In "trace" mode, the selected LUT bit is not flipped but changed from '0'/'1' binary level to 'L'/'H' meta level, to observe the effect of this given LUT entry over the output(s).

A few features are still missing, for example we can't change the LUT when the simulation is started... DFFs are not alterable yet, either, but it's not critical.

Many tools, tests and examples shoud be written but this release is really a game-changer !!! Download it and try it !