I've started with reverse enginering the PCB and documenting it in KiCad's eeschema.
The result is the schema below, you can zoom in by opening the image in a separate tab/window and use your browser's zoom, it's an SVG so the zoom is very good.
The schema was drawn based on the PCB of one my devices, yours could be a little different but the MCU pin to output pin mapping should be the same, otherwise the ST Link firmware would not work.
Even without soldering or cutting existing traces 5 GPIOs are externally available on 4 pins. Of these 5 pins 2 are PWM capable (TIM4_CH1 and TIM4_CH3) and 1 possible ADC pin (ADC_IN5)
Con Pinn | ST-Link Function | MCU Pin | Main function | Alternate functions |
---|---|---|---|---|
1 | RST | 42 | GPIO PB6 | I2C1_SCL, TIM4_CH1, USART1_TX |
2 | SWDIO | 27 | GPIO PB14 | SPI2_MISO, USART3_RTS |
3, 4 | GND | |||
5 | SWIM | 45 | GPIO PB8 | TIM4_CH3 |
6 | SWCLK | 15 | GPIO PA5 | SPI1_SCK, ADC_IN5 |
6 | SWCLK | 26 | GPIO PB13 | SPI2_SCK, USART3_CTS |
7, 8 | 3.3V | |||
9, 10 | 5V |
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Hey, would you share your kicad schematic? Do you also have the PCB design?
I would like to repurpose mine and document it by modifying the schematic. Also, I would later make a 3D case for it.
Are you sure? yes | no