I got the delay line working tonight. It took a a little re-work on the PCB because I didn't understand the SY89296 datasheet. Luckily it was just one of the control lines and not the data, which is high-speed and impedance controlled and doesn't like to travel in blue wires very much.

I learned two important things. First, PECL is crazy power-hungry. I "debugged" the board for an hour looking for shorts or reversed components after noticing it drew 300 mA when I first applied power. I come from CMOS land, and expected an order of magnitude less current. Of course, once I dug through all the datasheets, I realized this was normal. The PCB is nice and toasty.

Second important thing: you have to use a *light* touch cutting traces on 4-layer PCBs. That second layer (in this case a ground plane) is only 6.7 mils under the top layer. It's very easy to cut down into the next layer and possibly short stuff. I'm used to hacking away willy-nilly with a knife, and that just doesn't cut it in this case (pun intended).

Anyway, I got the thing working. There's a 10-bit digital control and a 12-bit analog fine tuning of the delay. I measured approximately 9.54 ps per digital step, and around 28 fs per analog step, although individual steps of both both were lost in the jitter noise of the delay and the measurement on the scope I was using. Individual steps of the analog tuning will never be of much use - the intention is to simply use the analog tuning voltage to get the digital steps in nice 10 ps increments, although I'll certainly see how far I can push things.

The next step is to build a feedback oscillator with this delay line, and measure the oscillation frequency accurately to calibrate the delay.

Maybe I'll make a quick oscilloscope with it first just to see it work.