A small design created with GreenPAK designer for SLG46110 is now working in 3 different FPGA's Xilinx Spartan-7 (S7-mini from BML), on Lattice XO2-4000 and in GOWIN 1NR9 FPGA. Bitstream loading over simple UART ASCII download protocol.

This is the circuit I am using for testing, the clock is selected 25KHz and pre divided, so the output is visible blinking, sending "AT" in Morse code.