I've spent a fair bit of time on the software for the board over the past week, and finally have a fairly nice serial boot loader working, meaning that software iteration is now much quicker  as there's no need to pull the ROMs and reprogram for each test. This also means fewer dead ROM chips (I've got a small collection of failed chips that haven't survived the constant pull/program/reinsert loops).

This boot loader also handles initialisation of the rest of the system and provides a few TRAPs that can be used by loaded code. These are leveraged by a very simple proof-of-concept "kernel" that can be loaded by the boot loader and handles relocating itself from the initial bootload location, C linkage (with .bss initialisation etc) and provides the beginnings of a low-level library that interfaces with the machine via the aforementioned TRAP vectors.

As well as proving the boot loader works, this will serve as a useful base-project for code that can be loaded by the loader, and means I can really start working on the software for the computer now I'm free of the the 16KB limit imposed by the ROMs.

So with that, the PCB migration KiCad done and work started on the revision one board, it's been quite a busy week all round :)

EDIT: Adding a link to the code in case anyone wants to have a look: the serial boot loader is here, and the POC "kernel" is here.