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Rev. 3 designed and on the way

A project log for DLT one - A Damn Linux Tablet!

Modular Open Source Hardware Tablet that is easy to hack and can run a standard Desktop Linux Distribution (or Android)

timonskutimonsku 10/29/2019 at 21:540 Comments

I've finished designing rev. 3 of the motherboard and its actually arriving tomorrow :)

I may have figured out what the issue with eDP was. I noticed that lane 0 and 1 were running on the bottom layer and the reference plane which I believed to be GND was actually 5V. While you can switch reference planes you have to give the return current a path to follow along by placing capacitors at the spot where you cross over, which of course I didn't do and the impedance probably sky rocketed.

I fixed this now and everything is referenced to GND at any point. Lets hope it works again.

I also went with the reversed connector so the module is inserted upside down with the SoC facing towards the PCB. I added cut-outs to the PCB so I can place a piece of aluminium or copper in the cut-out and pipe the heat from the SoC directly into the mounting plate which will act as a gigantic heat sink. This safes tons of height and hopefully solves the lurking issue of thermal dissipation.

Other than that no crazy changes. I switched from JST PH to JST SH which is more low profile. It also meant switching to 4 conductors but that is actually a nice thing because thats also the type of cable Adafruit and Sparkfun use for their qwiik/stemma qt products so getting cables for that is really easy. I thought ahead and put the polarization in a way that wouldn't end in dead ICs if someone should ever have the idea to plug their qwiik boards into those power ports...

I also added a different 3.3V LDO which gives me a power good signal that I can use to power up certain things only when they should be. This is a thing when being connected to external circuits like a PC monitor, don't want those to back power you when you're shut down. So the 3.3V power good signal controls a load switch for the VCC connection of those peripherals.
This is part of a more robust layout that I will continue to add with further revisions, I skipped on that so far as it adds overhead that is not really needed in a controlled environment during prototyping.


I spare myself posting renderings as the real deal is arriving soon, so I will update again when those arrive.

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