2 channel differential output and 4 channel differential input with +32db instrument preamp on one module.
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Today i connected up the PCM5242EVM to the Teensy and used an I2C tool to figure out exactly what needs to be configured to have a working chip.
I did this over a series of tests. Here are the steps I followed (in various ways) to figure out what is needed to initialize the PCM5242 and have it work with the Teensy.
Here are the results.
I2S MODE:
TDM MODE:
Those steps should configure 4 PCM5242 in TDM mode with the Teensy running i2c_menu_plus_audio_tdm_2019-06-18.ino. Using my tests I was able to confirm that this would work. I have 8 independent output channels going down the TDM I2S Lines.
When only one PCM5242 is connected to the I2S bus coming off my breadboard it seems pretty stable. I have a few ground lines connected from the PCM5242 to the Teensy that make it work fairly solid. When I connect up the second PCM5242 things get a little less reliable. I have been able to have 4 lines play through the 2 devices at the same time. However, as time goes on, or things move on the desk one or more of the devices will error out and stop playing music. As soon as I unplug one of them, it becomes reliable again.
I want to be sure that each I2S/I2C bus is stable - even on longer lines because the goal is to be able to connect as many as 4 of these modules (or even more of other designs) to the Teensy at one time over ribbon cables. So I've been doing some research on this topic at the diyaudio forum here. It's unclear whether my issues were the master clock, or all of the lines. I'm following the Standard freeDSP expansion connector design so here is the pinout.
I'm considering the option of using an I2C multiplexer for the I2C lines (SDA, SCL). This should give me some added flexibility of being able to connect up modules with the same addresses as eachother and configure them different ways. But then again the I2C is probably not the problem.
For the Master Clock, there are buffers specific for it. But I would rather buffer all the I2S lines to assure reliability. Most audiophiles say buffering an I2S line is a bad idea but there are some examples of it and the datasheet for the SN74LVC3G34 Triple Buffer Gate mentions audio devices as using this buffer. I guess you would just buffer the BCLK, LRCLK, and MCLK. For incoming data you would need to put the buffer on the other...
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