In the last log we got the Multi-boot monitor to run however, when BASIC was run it hung.

The Z80 is trying to access I/O address 0x39 which isn't implemented yet. That's the swap back to the original BIOS code. Since it was never swapped out it can be swapped right back in with an ackIO( ).

After adding back in the BIOS, BASIC now works as launched from Multi-boot with the S5 command.

Cold or Warm?

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
57694 Bytes free
Ok

10 print "HI"
run
HI
Ok
list

10 PRINT "HI"
Ok

Added in code that when the 0x39 (swapped back) is received then goes and causes a BUSREQ*, waits for a BUSACK* and copies the BIOS back into SRAM.

Back to Debugging CP/M

The CP/M code is in and the BIOS code looks like this:

; Disable the ROM, pop the boot disk and IOBYTE from the stack 
; (supplied by monitor), then start the OS
;    org 0FFB0h
popAndRun:
    ld A,01h 
    out (38h),A        ; kick ROM

    pop AF            ; Monitor gives physical boot volume
    ld (mnttab),A        ; ignore 8 bit volume number

    pop AF            ; Monitor gives the IOBYTE ...
    ld (IOBYTE),A


    ld HL,mnttab
    ld (0FFFEh),HL        ; put mounttab vector in FFFE
    ld HL,backdoor
    ld (0FFFCh),HL        ; put backdoor vector above that
    ld A,0C3h
    ld (0FFFBh),A        ; and a JP opcode above that
    ld C,0
    jp BIOS

S2 also works.

Z80 CP/M BIOS 2.20
Based on MULTICOMP by G. Searle 2007-13
http://searle.hostei.com/grant/Multicomp

CP/M 2.2 (c) 1979 by Digital Research


STARTUP?

A>dir
A:   Volume 002 : ASM      COM : DDT      COM : DISPLAY  COM
A: DOWNLOAD COM : DUMP     COM : DUTIL    COM : ED       COM
A: LOAD     COM : MOUNT    COM : PIP      COM : RDINIT   COM
A: RESET    COM : STAT     COM : SUBMIT   COM : TIME     COM
A>

S3 also works.

CP/M V3.0 Loader
Copyright (C) 1998, Caldera Inc.

 BNKBIOS3 SPR  FA00  0600
 BNKBIOS3 SPR  7400  0C00
 RESBDOS3 SPR  F400  0600
 BNKBDOS3 SPR  4600  2E00

 61K TPA


CP/M Version 3.0 BIOS (2016/9/13)
FPGA-Z80 Multicomputer
Original concept by Grant Searle


A>

 S4 boots but hangs.

MP/M II V2.1 Loader
Copyright (C) 1981, Digital Research
Nmb of consoles     =  4
Breakpoint RST #    =  6
Memory Segment Table:
SYSTEM  DAT  FF00H  0100H
TMPD    DAT  FE00H  0100H
USERSYS STK  FC00H  0200H
XIOSJMP TBL  FB00H  0100H
RESBDOS SPR  EF00H  0C00H
XDOS    SPR  CD00H  2200H
BNKXIOS SPR  C200H  0B00H
BNKBDOS SPR  9F00H  2300H
BNKXDOS SPR  9D00H  0200H
TMP     SPR  9900H  0400H
LCKLSTS DAT  9600H  0300H
CONSOLE DAT  9200H  0400H
-------------------------
MP/M II Sys  9200H  6E00H  Bank 0
Memseg  Usr  0000H  C000H  Bank 1
Memseg  Usr  0000H  C000H  Bank 2
Memseg  Usr  0000H  C000H  Bank 3
Memseg  Usr  0000H  C000H  Bank 4
Memseg  Usr  0000H  C000H  Bank 5
Memseg  Usr  0000H  C000H  Bank 6
Memseg  Usr  0000H  9200H  Bank 0

S6 doesn't boot.

S7 boots.

> S7
CP/M V3.0 LoaderBIOS for Grant Searle's Multicomputer

 Loading ZPM3...
 BNKBIOS3 SPR  FA00  0600
 BNKBIOS3 SPR  7400  0C00
 RESBDOS3 SPR  F400  0600
 BNKBDOS3 SPR  4600  2E00

 61K TPA

CP/M Version 3.0 BIOS (2016/9/13)
FPGA-Z80 Multicomputer
Original concept by Grant Searle

    ZCPR compatible system for CP/M+ by Simeon Cran

Loading NAMES.NDR

RamDisk: Initialized

00:00 A0:SYS>

Tried S1 twice and it booted on the second try.

Z80 CP/M BIOS 2.20
Based on MULTICOMP by G. Searle 2007-13
http://searle.hostei.com/grant/Multicomp

Dos+ 2.5  Copyright 1986 (c) by C.B. Falconer

CCP+ Ver. 2.2

A>

zexall runs on S1.

A>A:DOWNLOAD zexall.com
................................................................
....
OK

A>zexall
Z80 instruction exerciser
<adc,sbc> hl,<bc,de,hl,sp>....  OK
add hl,<bc,de,hl,sp>..........  OK
add ix,<bc,de,ix,sp>..........  OK
add iy,<bc,de,iy,sp>..........  OK
aluop a,nn....................  OK
aluop a,<b,c,d,e,h,l,(hl),a>..  OK
aluop a,<ixh,ixl,iyh,iyl>.....  OK
aluop a,(<ix,iy>+1)...........  OK
bit n,(<ix,iy>+1).............  OK
bit n,<b,c,d,e,h,l,(hl),a>....  OK
cpd<r>........................  OK
cpi<r>........................  OK
<daa,cpl,scf,ccf>.............  OK
<inc,dec> a...................  OK
<inc,dec> b...................  OK
<inc,dec> bc..................  OK
<inc,dec> c...................  OK
<inc,dec> d...................  OK
<inc,dec> de..................  OK
<inc,dec> e...................  OK
<inc,dec> h...................  OK
<inc,dec> hl..................  OK
<inc,dec> ix..................  OK
<inc,dec> iy..................  OK
<inc,dec> l...................  OK
<inc,dec> (hl)................  OK
<inc,dec> sp..................  OK
<inc,dec> (<ix,iy>+1).........  OK
<inc,dec> ixh.................  OK
<inc,dec> ixl.................  OK
<inc,dec> iyh.................  OK
<inc,dec> iyl.................  OK
ld <bc,de>,(nnnn).............  OK
ld hl,(nnnn)..................  OK
ld sp,(nnnn)..................  OK
ld <ix,iy>,(nnnn).............  OK
ld (nnnn),<bc,de>.............  OK
ld (nnnn),hl..................  OK
ld (nnnn),sp..................  OK
ld (nnnn),<ix,iy>.............  OK
ld <bc,de,hl,sp>,nnnn.........  OK
ld <ix,iy>,nnnn...............  OK
ld a,<(bc),(de)>..............  OK
ld <b,c,d,e,h,l,(hl),a>,nn....  OK
ld (<ix,iy>+1),nn.............  OK
ld <b,c,d,e>,(<ix,iy>+1)......  OK
ld <h,l>,(<ix,iy>+1)..........  OK
ld a,(<ix,iy>+1)..............  OK
ld <ixh,ixl,iyh,iyl>,nn.......  OK
ld <bcdehla>,<bcdehla>........  OK
ld <bcdexya>,<bcdexya>........  OK
ld a,(nnnn) / ld (nnnn),a.....  OK
ldd<r> (1)....................  OK
ldd<r> (2)....................  OK
ldi<r> (1)....................  OK
ldi<r> (2)....................  OK
neg...........................  OK
<rrd,rld>.....................  OK
<rlca,rrca,rla,rra>...........  OK
shf/rot (<ix,iy>+1)...........  OK
shf/rot <b,c,d,e,h,l,(hl),a>..  OK
<set,res> n,<bcdehl(hl)a>.....  OK
<set,res> n,(<ix,iy>+1).......  OK
ld (<ix,iy>+1),<b,c,d,e>......  OK
ld (<ix,iy>+1),<h,l>..........  OK
ld (<ix,iy>+1),a..............  OK
ld (<bc,de>),a................  OK
Tests complete
CCP+ Ver. 2.2
A>