Was just thinking - why not take advantage of the UART / Serial Port and try to turn this into a real time SID Synthesizer for the CPC? There are inexpensive UART MIDI breakout boards available 

https://www.amazon.com/ubld-it-MIDI-Breakout-Board/dp/B00YDLVLVO/ref=sr_1_1?keywords=midi+breakout+header&qid=1575390754&sr=8-1

I have used that board before for LambdaSpeak 3 and MIDI IN. 

Now, what the Speak&SID hardware and firmware needs to support in order to make this happen is the following: 

• read incoming MIDI data from the AVR UART and buffer it in a ring buffer - and that is already implemented in Speak&SID, as well as a generic serial API that allows the CPC to retrieve the UART buffer content byte by byte, using a read cursor. This interface uses CPC / Z80 IO address  /  port &FBEE. The CPC data bus is latched and "buffered" by the CPLD, in both directions (for  IOREQ writes: CPC -> CPLD -> AVR, and IOREQ reads: AVR -> CPLD -> CPC). 
• turn on the SID chip - the Speak&SID is turned on with a "SID ON" signal that is being generated by the AVR / ATMega. When that signal is given, the CPLD also decodes the address range &FAC0 - &FADC and routes all CPC / Z80 IO read/write requests in that range directly to the SID chip data lines; also passing the 5 lower bits of the IO address to the SID's address pins. The CPLD uses the "SID ON" and IOREQ and RD / WR signals in order to generate the SID's Chip Select Signal (~CS).  
• on the CPC side, the CPC needs to monitor the serial buffer and retrieve the incoming MIDI messages from the buffer, using the serial interface API at port &FBEE, then parse and process the MIDI messages, and translate them into corresponding SID register writes to make the sound heard. Since the SID is turned on when the "SID ON" signal is given, and each read / write within the  &FAC0 - &FADC IO address range goes directly to the SID, the CPC can just write these SID registers directly. 
• at first I was thinking that there might be Z80 / CPC databus contention since both the ATMega and the SID needs to be connected to the data bus, but then I realized that this is actually not the case, since the address ranges are disjoint and the data bus is immediately released after the IOREQuest, and the requests for SID and CPLD / AVR are sequential in nature. So I don't even need to turn off the "SID ON" signal for reading the data from the UART buffer, since the SID only claims the data bus via ~CS when "SID ON" AND IOREQ RD / WR AND the the port address is in the &FAC0 - &FADC range, and &FBEE for the serial interface is different.       
• moreover, given that the CPC has to run a program that reads the MIDI messages from the buffer, and processes and translates them into corresponding SID register writes, that program can also feed the CPC's internal AY 3-8192 sound chip to play MIDI notes as well, hence resulting in a SID + AY real time synthesizer, with 6 channels in total. Obviously, methods of addressing SID and/or AY independently can also be implemented (e.g., using different MIDI channels).  

So, it seems that the hardware and firmware of Speak&SID already supports almost everything that is required for this! Only a tiny change to the AVR firmware is required (I need to ensure that the SID chip is not turned off while the serial buffer is being read).   

This hence mainly requires CPC software...I alread have a piece of CPC ASM Software that turn the CPC into an AY MIDI real time synthesizer (written for LambdaSpeak 3), and it should not be difficult to use that for the Speak&SID SID MIDI IN Synthesizer.   More soon!