I've been trying out different ways of optimizing the code to maximize the headroom for more HW-blocks in the Pico, and in doing that I happened to read the datasheet of the SRAM. There are 2 ways of controlling the read/write cycle, and I used the more traditional with CS tied to ground, WE & OE controlled by 2 separate signals from a 74LVC373. The 373 register was needed because the Pico has too few gpio pins. The other way of controlling the read/write cycle is to tie OE to gnd, WE to R/W of the 65C02 and use CS to tell when a read OR write cycle is occuring, saving a gpio pin.
I repurposed the SYNC-pin from the Pico that I didn't use anyway and now control the SRAM directly without going through the register (which takes extra time).
4 lifted legs and 3 soldered wires is all it took to mod the circuit, no cut traces.

The SW has also been reorganized some to enhance the performance a bit further.

All in all, I went from 18500/20000 down to 14900/20000 with all these changes. Well worth it!

Now I just have to document it all and respin the schematic and layout before ordering new PCBs. Or maybe wait for further inspirations to pop up...