Since I've worked on the HW aspects of the project I started to question my choice to divide the 64KiB memory space into 8 banks of 8KiB each. I guess 8x8 had a nice ring to it...
The HW is now designed with 4x 16KiB banks, and the SW has changed accordingly. It lead to significantly fewer number of cycles required in thread switching, and the code actually looks much cleaner since the banks are fewer. It also feels like 4 is a very good number to use, 1 for the scheduler/OS, 1 for the main code/stack/ZP for each thread, and 2 more to make swapping/copying in each thread painless. Fewer banks would be cumbersome, more banks are not really necessary very often.
One downside is the increased waste when doing small threads, but that is not a real problem with all the memory available in this system.