I've worked on the extended HW version with Teensy, W65C02, memory and bank registers. Updated the schematic and did a 2-layer PCB layout. The auto-router didn't want to play so it was all done by hand. Lots of changes to pinning on the Teensy, bank-registers and memory to ease the routing. It was not possible to route by hand otherwise.
Now I'll wait a few days and then do a proper audit before I commit to an order from some Chinese PCB-manufacturer.
The new pinning means more CPU-cycles spent on the Teensy, but that is not a big problem. The major delays are because of the 74HC bank registers which are sooo slow! A CPLD would have been MUCH faster, AND easier to implement. Unfortunately my old programmer does not want to play...
Discussions
Become a Hackaday.io Member
Create an account to leave a comment. Already have an account? Log In.