I've gathered the various pieces of the design as follows:

RETRO-EP4CE15 Card

• RETRO-EP4CE15 Card
  • QMTECH EP4CE15 FPGA Card

M68000 CPU

• TG68K_2013 VHDL Core
• Tested to run at 25 MHz

Monitor ROM

• TSBUG2 Monitor
• TUTOR Monitor

Internal SRAM

• 32KB
  • 16Kx16

Video Display Unit (VDU)

• Based on Grant Searle's ANSI terminal
• Emulates 6850 UART interface
• VGA video
  • 80x25 characters
  • 640x480 resolution
  • 2/2/2 bits RGB (64-colors)
• PS/2 keyboard

6850 ACIA UART

• Neal Crook's modifications to Grant Searle's 6850 VHDL code

GitHub Repository

The repository is here.