Hardware

Runs on Cyclone II EP2C5 Mini Dev Board using Land Boards EP2C5-DB card which adds:

• 128KB SRAM (not all usable without some paging scheme)
• Composite video connector
• PS/2 keyboard
• Serial port (can connect FTDI USB to serial)

Design is based on Multicomp UK101 FPGA project with Multicomp elements (both) by Grant Searle.

Adds High Speed SD card interface from mc1024 project.

Memory Map

SD Card Interface

SD Card addresses are:

From the SD Controller VHDL file comments:

For both SDSC and SDHC (high capacity) cards, the block size is 512 bytes 
(9-bit value) and the SDLBA registers select the block number. 
SDLBA2 is most significant, SDLBA0 is least significant.

For SDSC, the read/write address parameter is a 512-byte aligned byte address. 
ie, it has 9 low address bits explicitly set to 0. 
23 of the 24 programmable address bits select the 512-byte block.
This gives an address capacity of 2^23 * 512 = 4GB .. 
BUT maximum SDSC capacity is 2GByte.

To avoid the addressing differences between SD and SDHC cards, I am going to use SDHC cards. These are greater than 2 GB (typically 4 GB cards) but can be as large as 64 GB. Hard to imagine there's that many GB of OSI / UK101 code out there.