The new (4-layer) board is working its way through JLCPCB - already 20% completed! I ordered 15 boards, not because I expect to use 15, but because it was like $5 more than 10 boards. They should arrive around finals week, which means I have some time over spring break to build them.
I uploaded a PDF of the newest schematic to GITLab. This includes:
- fixes for the polarity of the output register CLR input
- tying A16 of the SRAM to ground
- a bypass solder point (BBP): in case the 5V boost doesn't work, I can remove those components and solder this jumper closed
- an 800 mA LVD 3V3 regulator
- connections for an ESP-01 which, when powered, will send/receive serial data to/from the AT328P; when not powered, the FTI-231 will exchange data with the AT328P. Multiplexer logic is driven by the output of the WiFi switch (which drives the 3V3 regulator, which powers the ESP-01)
- added logic for decoding the address bus so only port 0xFF interacts with the user I/O (and dang! I just realized as I typed that that there's a problem...my 8-input NAND gate is connected to the DBUs instead of the address bus :/ oh well, always good to do some board re-work! Will just skip the NAND gate and hardwire the output point low); and
- edge connectors for all Z80 signals.
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