The SGT1 was an STEbus colour graphics video board based on the 6845 with a 6803 microcontroller and 64K of DRAM. The 6803 drew text characters on the pixel graphics display. 

It was quickly superseded by more advanced video boards, and the hardware details are lost. I can't recall much about it, apart from that it ran quite warm and was expensive - around twice the cost of a processor board.

The catalogue page says there are up to 640 × 288 pixels in 4 colours. 

640 pixels, 2 bits each = 1280 bits = 160 bytes. 320 pixels, 4 bits each = 1280 bits = 160 bytes.

So it looks like it is reading 160 bytes per line, with 224 bytes per 64 microsecond scan line, the character clock must be 3.5 MHz and the dot clock is 14 or 7 MHz. 

I did not think the 6845 could run that fast, the BBC Micro had a 68B45 running at 2 MHz character rate and 16 MHz dot clock. The HD46505 data sheet says it can run at up to 3 MHz. Perhaps the designers took the liberty of overclocking it? Truly square pixels would need 14.75 MHz dot clock, and 3.6875 character clock, so maybe the designers didn't feel able to overclock it that much.

Disassembling the firmware might reveal hardware details. First thing I looked for were 6845 initialisation values.

Looks like it is at F0B6, the first two values of 224 and 160 concur with expectations. I think the first should be one less, i.e. 223, but many 6845 firmware examples seem to forget this. It makes 0.45% difference, hence seldom noticed.

Now that we know this is the table of initial CRTC values, we can see where they are being sent, which will show the CRTC address. E178 is the loading routine, 0400 seems to be the CRTC address.

2022-10-21

Hardware and software manuals arrive, allowing me to confirm many details and add many others.

From the hardware manual, I see the video timing is from an LC delay line oscillator, running at a strange frequency of 26.75 MHz. This is almost the 27 MHz often used in video circuits. I don't know why they chose this frequency. Maybe it is a typo and they meant the 27.75 MHz that is used in teletext timing.

I applied power and tried measuring the frequency, but my meter did not give any plausible readings. It is rated to 60 MHz but I doubt it can do so with ordinary probe leads. Coaxial cable would be better.

I measured the character clock of the CRTC as 3.535 MHz, which is 1% above the 3.5 MHz expected in a 28 MHz system. I shall assume that 28 MHz is the designer's intent, and that the manual is wrong.

The HD46505 is rated to CLK = 3 MHz, the original 6845 is rated to 2.5 MHz. So the HD46505 is being overclocked.

The MC6803EL seems to be clocked at a third of the CRTC clock, i.e. 1.167 MHz. This is also overclocked beyond its 1 MHz rating.

The video outputs are TTL levels, and will need buffering to the 1V into 75 ohm inputs of my SCART socket analogue TV.

The PCB has four-layers to provide good power distribution to the DRAM chips, which take heavy current spikes.

The corrective wire on the back joins pin 2 of PL2 to pin 6 of IC6. This is in the circuit diagram. This is port 2 bit 2 which is the data ready flag (/DREADY).