As always I underestimated my ability to focus on.. well, even just school, let alone anything else.

There were some snags bringing up the board (aren't there always?), and I discovered a handful of design flaws to fix as well. I also identified quite a few areas that could be cleaned up/simplified/sped up. The next revision will hopefully have the same functionality but with fewer parts, a slightly smaller PCB, and much better behavior at the intended 10-12Mhz clock rate. Maybe I won't put the DMA controller on the wrong side of the address buffers this time too. Just a thought.. 

Renders and build photos as soon as they appear! 

[update: board is off for manufacturing]