1. The article was first posted on Apr. 17, 2021

2. Revised on May 2, 2021

      Added a photo of the back panel and power supply in Fig. 9 and its explanation in Chapter 9.

      Added the source code for the marching memory test (Source_code_MEMORY_TEST-1_1_0.pdf) to the attachment.

      Added an inside overall picture (IMG_1577.jpg) and a back side picture (IMG_1578.jpg) to the attachment.

3. Revised on May 22, 2021

     Added the schematic of power supply (PERSEUS-8_Power_supply_schematic_01.JPG) to the attachment.

4. Revised on May 28, 2021

     Added the video (Floating-point arithmetic on homemade computer PERSEUS-8) to the detail.

5. Revised on Aug. 16, 2021

     Added the Chapter 12 (Floating point interpreter for PERSEUS-8).

6. Revised on Nov. 04, 2021

     Added the Fig. 10 "ROMs of the floating point interpreter mounted on the PERSEUS-8 main board" to the Chapter 12.

7. Revised on Mar. 09, 2022

     Changed the chapter 11 (Future plans as of May. 2021) to (Floating point interpreter for PERSEUS-8).

     Added the video (Homemade Floating Point interpreter computes FFT) to chapter 11.

     Added the chapter 12 (ROMs).

8. Revised on Mar. 15, 2023

    Added a picture Fig.8 of a PROM programmer connected to the parallel interface in the Chapter 8 Peripherals. 

9. Revised on Mar. 20, 2023

    Added a video to introduce updating the interpreter by using a homemade PROM programmer for Chapter 12.

10. Revised on Mar. 24, 2023

    Added the schematic of a home made PROM programmer to the attached files and added its links for Chapter 8 and 12.

11. Revised on Jul. 20, 2024

    Added more detailed description of countermeasure for CPU reset sequence defect with the HALT state in the chapter 7.