Designed a custom I/O processor (IOP) in VHDL. Runs autonomously from the Host CPU. 

8 Bit CPU Application

The 32 LEDs can be used to monitor

• 16-bits of instructions
• 8 - bits of data
• 8 status lines (Run, etc)

The 32 pushbuttons can be used for:

• 16-bits of address
• 8-bits of data
• 8 control lines (Run/Halt, Examine, Deposit, etc)

IO Processor (IOP) Block Diagram

IOP Features

• 16-bit instruction
  • 4-bit opcode
  • 4-bit register select
  • 8-bit address/offset
• I/O Memory Interface
  • 8-bits of data (in/out)
  • 8 address lines
  • Read/Write strobe
• 3 bit grey coded state counter running at 50 MHz
• 50 MHz/8-bits/instruction = 6.25 MIPs (plenty fast enough for I/O)

Instruction Format

Assembler Input Format

CSV file with constrained input format. Header must match the example.

Compiler Input Format

CSV file with constrained input format.

First line WR001 compiles to:

Listing file:

I/O Map