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[005] Program Memory!

A project log for rj32

A 16-bit RISC CPU with 32 instructions built with Digital and verilog for an FPGA.

rj45rj45 07/12/2021 at 22:560 Comments

Jan 14, 2021

In this video I build out the program memory store from an EEPROM and build a simple programming interface for it. I also add a diagnostic output for the one instruction currently supported. This is to support building out more instructions very soon.

As always, the video is available here:

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