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Disabling the bus error timeout

A project log for Applix 1616 Documentation

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keithKeith 08/07/2026 at 18:020 Comments

I wondered if the bus error circuit was generating spurious errors.

I guessed that bug-free running software would never access an invalid address, so it ought to be alright to disable bus error detection. So I did.

I cut the track between U33B pin 5 and U24C pin 10, near to U33B, then tied the track to VCC.

Power on and ... nothing. Not even CRTC initialisation and screen start up. 

It looks like the bus error handling is essential to sweep the CPU into executing some valid code.

But really, I would expect the code to present a sign-on screen before trying to access some expansion boards that may be present or not, and not have exception screens overwrite each other before locking up completely. It doesn't seem to be handling itself gracefully.

Jo is having more success than me, with a couple of known board errors and fixes. So I think any faults are likely to be component or assembly faults. This will take an unknown amount of time.

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