Board introduction : 

CPU and Memory

• Core:  Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• Memories
  • Up to 1 Mbyte of Flash memory
  • Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM
  • 512 bytes of OTP memory
  • Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR, and NAND memories

Advanced Peripheral Interfaces

• 26 GPIO
• 8 3.3V PWM output
• 2 USART
• 1 I2C 
• 2 SPI
• 1 SD-Card

Sensor : 

- GPS Ublox

- 2 stepper driver 

- LSM6DSLTR

- LIS2MDLTR

- TMP75AIDR

BOM :

BOM V2.xlsx

Schematic : 

Schematic V2.pdf

PCB : 

Board V2.pdf

Sponsor : 

Thank you to JLC PCB for sponsoring this second board prototype 

https://jlcpcb.com/HAR