I want to add a quick note for operation of the CPU.

The CPU only does move instructions.  So each instruction is a source address and a destination address.  The memory map of the processor is simple:

Address: Function

0: Trash register.  Write to this to send the data nowhere

1: Program counter (Lo byte).  Read or write to this address to update the program counter

3: Program counter (Hi byte).  Read from this normally.  Writing here will write to a temporary holding register.  When the Lo byte is written to, the high byte is transferred from the temporary register to the high byte of the program counter.  

5: Pointer address (Lo byte):  Write-only to the address pointer.  When the pointer data register is Read/Written, the pointer address is used instead.

7: Pointer address (Hi byte):  Write-only to the address pointer.  When the pointer data register is Read/Written, the pointer address is used instead.

8: Pointer data:  Read/Write register.  When this address is written or read, the data will instead go to/from the address stored in the pointer address registers.

And that's it for the CPU instructions.  The ROM and RAM and all other peripherals can go anywhere else.  However, the program counter starts up at zero.  So it will execute a few garbage commands first.  I use the ROM at $0000-$7FFF, and the RAM at $8000-$FFFF.  The CPU will go into the ROM boot code then after reset.  The CPU has an override signal that goes to the ROM to prevent it from outputting to the data bus when the $00-$0F functions are accessed by the CPU.  This can also be used by other peripherals if you put them in the lower memory space.  I may change this so that the CPU functions are at like $FF00 instead so it can boot right into ROM.  I figure I'll sort it out after the video is done.

The CPU can do simple arithmetic using the ROM and indirect addressing, or branching using indirect addressing as well.  Or you could add an ALU peripheral if you want.