Above is the recommended layout for the TPL5110 Timer, which is done like this to reduce parasitic capacitance which in turn will mess up programming of the timer. What is does not show is that the tracks to the MCU itself should also be as short as possible.

In the current design there are some compromises as I've put in a wacking great big 6 way resistor selector switch which, even though it's right next to the timer chip, will add plenty of parasitic capacitance. Strangely, the timer chip can be still be programmed right up to 2 hours, but for some of the options, only work once! Also, the timer is fussy about how it's programmed and seems to prefer to be programmed in steps from the lowest value resistor progressively upwards. So to program a 40 minute time interval, it needs to be programmed firstly for 2 minutes, then for 10 minutes and then for 40 minutes or else it just refuses to work. 40 minutes seems to be the upper limit for the current configuration which can only be improved by getting rid of the resistor switch block and moving the timer chip and associated NPN transistor closer to the MCU. Some improvement might be achieved by changing to board material to a better dielectric specification and increasing the thickness of the board, but probably not worth the extra expense!

If I wanted longer time intervals between transmits, I'd write a 'Death Counter' to the flash memory in the ESP32 and keep shutting the MCU down immediately until the Death Counter had reach to a proscribed number. The energy wasted in booting up the MCU for one second or so should be fairly low and it's only done once every 40 minutes.