Updated the CPU board schematic - added all the non-IC parts (resistors, capacitors, two test points, one jumper and one transistor), fixed up some errors on the previous version. Worked out how the data bus enable logic worked, and it does seem to switch off when reading from internal RAM (but not when writing, but presumably address decoding on the RAM card means this is harmless). Still not entirely sure what some signals do, but I think there's enough done now to get it talking to the ROMs, so I shall make a start on that card next.