The design is most likely overcomplicated, considering availability of off-the-shelf components which can replace most of the work. My goal is to learn play with RF, practical usability of the project is not a major concern.

The architecture in a few words is as follows:
- the input signal 0-3GHz is upconverted to first 4GHz IF
- the signal is downconverted in a few steps: 228MHz, 28MHz, 3MHz
- the final analog 3MHz is converted by ADC and further processed by FPGA
- the FPGA mixes the signal with sine and cosine and moves the spectrum down to baseband complex signal, then filters and downsamples the signal (one or more times, depending of selected resolution bandwidth), finally RMS is calculated from the filtered signal

A few words about why it doesn't work:

- The biggest issue is really bad 1st LO. It's a wideband 4-7GHz synthesizer, quite hard to make. It has VCOs up to 3.5GHz so the frequency must be doubled. This creates need for adding switched filter banks. The filters and switches are quite bad and introduce a lot of loss, which is then compensated by a lot of gain. The result is that the small signal is spoiled by noises from ambient and also the amplifier with huge gain tends to be unstable. And the whole board is not shielded yet. Bad quality of the 1st LO creates a lot of random spurs in the measurement.

- IF part which converts signal from 228MHz to 3MHz contains filters and mixers which adds some losses, then IF amplifier introduces noise. The overall SNR seems too high. Filters should be higher quality (maybe still with air coils but larger), amplifiers may need to be somehow optimized, also some filtering at the end may help to cut off more low frequency noises. So the IF part works but it's not great.

- First and second mixers - this part is probably not great but it's probably not the biggest problem (may need more testing but possibly it's good enough for now).

- Digital part - it works but may need some optimization, improvements, debugging.