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20230212c -- Delays and cycle counting

A project log for ROM Disassembly - AlphaSmart Pro

Wherein I disassemble the ROM from a vintage typewriter-thing

ziggurat29ziggurat29 02/15/2023 at 19:420 Comments

There are a couple delay routines in the firmware, so I set out to determine how long they are for.  This means tallying the cycle count, and understanding the relationship between the external oscillator and machine cycles.

On the 68HC11, the external oscillator is divided by 4 to yield what is called an 'E-cycle', which is the machine cycles listed with the instructions.  On this board, an 8 MHz crystal is used, so the E-cycle rate is 2 MHz (500 nsec).

An internal delay routine:

F623             sub_F623:
F623 18 CE FF FF     ldy     #$FFFF     6 cy
F627             loop_F627:
F627 18 09           dey                4 cy
F629 01              nop                2 cy
F62A 26 FB           bne     loop_F627  3 cy
F62C 39              rts                5 cy

The loop executes 65536 times, so the net result for this routine is 589,835 cy, or 0.294918 sec.

An outer delay routine invokes this a couple times:

F61E             sub_F61E:
F61E 8D 03           bsr     sub_F623   6 cy (+ 589,835 cy)
F620 8D 01           bsr     sub_F623   6 cy (+ 589,835 cy)
F622 39              rts                5 cy

So this routine takes 1,179,687 cy, or 0.589843 sec.

This routine is referenced quite a bit throughout.  Both of these delays are quite long for something like key debouncing, so they surely are not used for that.

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