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Relay CPU using an FPGA as mathematical coprocessor

A project log for Homebrew 16 bit relay computer

Goal of the project is to develop and build a homebrew 16 bit relay computer

peterPeter 12/25/2025 at 10:390 Comments

In the following video, the relay system calculates the square root of 60,000 with an FPGA acting as a mathematical coprocessor. The VHDL code running on the FPGA emulates the relay system’s design, so the square-root routine is identical to the one shown in the video from a few months ago.

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