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Phase One: Pin Assignment

A project log for Feather Op Amp Lab

A custom Feather with SAM L21 microcontroller, paired with wings that let us interactively explore its integrated op amp peripheral.

joey-castillojoey castillo 05/19/2023 at 00:050 Comments

Whenever starting a new microcontroller project, one of the first things to do (after, y'know, picking out a microcontroller) is assigning pins to purposes. And on this one, I've had a lot of practice: I first envisioned making a SAM L21 Feather back in 2019, long before I had the skills to design a thing like that (at least to my standards of today). 

Anyway, if you clicked the link to that tweet, you'd see a photo of a table from the data sheet, along with my four-year-old notes on what I thought each pin might do. Some of those pin assignments were set in stone; PA24 and PA25, for example, are the only USB-capable pins. Same with PA30 and PA31 for SWCLK and SWDIO. But beyond that, there's a lot of flexibility in how you choose to assign pins to the things you want to do, and especially for a dev board like a Feather, we want to choose to expose pins with the most functionality possible to the end user of our board. 

Pin Multiplexing Overview

It will not shock you to learn that years later, revisiting this project with more experience and skill, I made different choices. There's a lot to unpack here, but it might be easier to walk through this if we understand roughly what we're trying to do. First off, let's look at the top line of the pin mux table in the SAM L21 data sheet: 

What it's telling us here is that while these pins can be general purpose IO pins, they can also be assigned to different peripheral functions that are described in that top header row. What are those peripherals? Let's walk from left to right, starting with the column named A: 

Goals

PHEW! That's a lot! Lest we get overwhelmed, let's take a step back and figure out what our goals are: 

  1. I'm doing this for the Op Amp Challenge, so I want to break out all of the op amp pins, naturally.
  2. I need to connect the analog reference system to the Feather's ARef pin.
  3. I need the standard Feather features: USB, I2C, SPI and UART.
  4. I'd like to reserve some pins for future use: a second SPI bus for a SPI Flash chip, and a Neopixel to make it an "Express" style board.
  5. Beyond that, my only goal is to break out as much functionality as I can; if later I decide I want to use, say, the Analog Comparator, I want to make sure that those Analog Comparator pins are broken out. 

Picking Pins for One Subsystem

In fact, let's take a look at the analog system now. Here I'm highlighting just the pins related to the ADC, AC, DAC, OPAMP and REF systems: 

There are two pin numbers that matter here: Function is the pin I'm assigning them to on the Feather headers. I/O pin is the pin as named in the underlying firmware. And the functions on the right are the different things we can use them for. So, off to the far left, we can connect, say, I/O pin PA02 — the DAC's VOUT[0] — to pin A0 on the Feather header. It feels right that DACs should be on the first analog pins available. 

For the REF system, we have two options: VREFA on PA03, and VREFB on PA04. But looking closer, PA03 doesn't do that much for us; it has a PTC channel, but other than that, it's kind of a slouch. Instead, I've claimed PA04 for the cause, because it has more alternate uses: we can use it as voltage reference B, but it also works with the analog comparator, op amp #2, a SERCOM peripheral, the TCC for PWM, or as an input to the CCL peripheral.

On and on we go; PA05's VOUT[1] becomes the second DAC on A1, and then A2-A4 get the remaining opamp pins. With that, we've successfully achieved goals 1 and 2 — and we're on our way to #5! Given all the alternative functions of these pins, we've already broken out two and a half SERCOMs, eight PWM outputs and six pins in the CCL!

And on and on...

I could go on and on about this process, but let's do the rest in broad strokes: For goal #3, we need to find three free SERCOMs (two pins each for I2C and UART, and three for the SPI bus). Goal #4 is much the same: four pins for a Flash SPI bus, and two for Neopixel and Neopixel power. Chewing through the list, it sometimes feels like solving a crossword puzzle. Other times, it feels like solving a maze; in the screenshot below, once I considered routing, it felt only natural that pins 5, 6, 9 and 10 would connect to the top right of the chip; there really weren't many other options.

Final Answer

To make a long story, well, not short, but less long: here in all its glory is the pin mux for the new Feather Low Energy. The gist: 

I think this is the most optimized possible pin selection for a SAM L21 Feather board. I think it will serve me well in the Op Amp Challenge, and I foresee it making its way in to many more projects in the future. 

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