Got a few of those core memories from a Russian PDP-8 clone, the Saratov-2, it´s 64x64 core matrix, forming 4096 bits.
I´d need four of those planes for the computer, one plane for each bit of the 4-bit word. The thing is that they are only addressable by 64x64 lines, so they would need 128 line drivers. And there is only one inhibit wire that can disable the whole matrix, so I can´t subdivide the matrix.
It makes sense when you use ICs or transistors that drive such a big matrix, but addressing all 64 lines and 64 columns with tubes would be just insane.
I am thinking of either weave the core memory myself or to at least weave more inhibit wires into the existing ones; four inhibit lines, each for one of the four quadrants.
In that case, I could use just 2*32 line drivers (+4 inhibit drivers) instead of 2*64 - each driver consisting of several tubes.
Or I could use 16 inhibit lines and only 2*16 line drivers, dunno yet.
The current needed for flipping the core is around 500mA, so 250mA per X/Y line. I´ll use transformers to get the 20mA current of the tubes up to 250mA, I need to wire the transformers manually. Another reason to reduce the driver count.
I´ll try to modify the existing modules, let´s see how hard this turns out to be :-D. I got a microscope, and I did SMD for decades, so it should work out fine. Some task for the upcoming weekend...