A quick update after a 3 weeks break!
The processor board is fully built and I was able to free run the CPU without being connected to the motherboard. I already found some improvement to be done on the next revision :
- Move the GAL chip use to generate to act as a 82284 Clock diver and the 82288 Bus Driver to the motherboard chipset.
- Add some pins header along the edge connector to give me easy access to all the signals for debugging.
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The next step was to populate the motherboard and began the work on the CPLD in Quartus.
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It was the time for the big test... and it didn't go well..
The first issue was a huge short on the power rail, I found out that my VCC and GND pins on my edge connector where flipped. To be sure I looked back the schematics and confirmed that the A and B sides of the connector where not flipped :
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Then I realized that the footprint that I used was wrong... the A and B sides where indeed flipped and where mislabelled!
So now that I know the issue, I need to take a decision if I spin a new revision for my processor card or if I do a workaround for now in case I found more issue before ordering a new board.
I worked on the revision v0.4 of the processor board, I fixed the edge connector, added the pins headers and remove the GAL. I still need to integrate the 82288 bus controller in my chipset later.
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Before ordering this new revision, I want to do more test on my current v0.3 revision if possible. I have ordered a PCI extension that I will re-wire to be able to use my v0.3 board and make sure that I do not have other issue with the design.
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Next steps
- Make a workaround with a PCI extension to be able to test the current v0.3 board.
- Integrate the 82288 bus controller in my chipset.
- Make a new processor card revision.
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