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A project log for STEbus CMOS RAM, RTC and EPROM (SCRAM)

STEbus CMOS RAM, RTC and EPROM

keithKeith 05/02/2024 at 18:410 Comments

SCRAM

A combination of battery-backed RAM and real-time clock is offered by the SCRAM board, providing STEbus systems with facilities for applications such as data logging or pseudo EPROM for software development.

On-board are six 28-pin sockets which can be used for either 2k or 8k RAM or EPROM devices, allowing a total capacity of 48 kbytes. Jumpers provide great flexibility over where the RAM resides in the bus memory space, each of the six RAM sockets can be individually switched in or out of the selected block. You can select whether the card draws power from the bus or the on-board Ni-Cad battery. It is also possible to route the battery power onto the STEbus VSTBY line so that other cards can utilise it.

The real-time clock facility is based on the HD 146818 chip, providing hours, minutes, seconds, day-of-week, data, month and year information, as well as an alarm for programmable or periodic interrupts. The chip also provides 50 bytes of RAM for storage of clock or other data in the event of power failure.

Clock access is 1 microsecond. RAM access is under 400 nanoseconds.

STE bus

the board implements a simple slave interface to the bus; RAM can be located anywhere in the memory space; the realtime clock registers are mapped into the bus space, and can jumper-selected in 16, 32 or 64 byte blocks.

Power Consumption

typically under 0.5A at 5V when operating, and less than 200 µA when powered down.

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