I am writing the log mostly because I used this project PCB in some exercises of testing a new kid on the autorouter-block.

Inspired by an interview of the founder of the Quilter autorouter [Sergiy Nestorenko], and just having finished to layout my Pico-Video4 board, I spend some time comparing the results of my efforts to an AI approach.
My design was not perfectly in their 'sweet spot' but not too complicated either. To give everybody a fair chance I locked the connector positions. Not locking the mounting holes  was an experiment to see if the AI could make sense of those and ended up in some especially funny results. Highly recommended /s.

I won't comment on the pictures, the results speak for themselves. I disabled the copper pours to give a better visual on the tracks. Quilter did put put GND pours on every outside and inner layer of the design.

The starting position:

My final result 2-layer:

Quilter, fewest layers 2-layer

Quilter, shortest tracks 4-layer

Quilter, no constraints 6-layer

Quilter, routing only with my pre-placement 4-layer

The layer view just don't do justice to the results, here is a 3D view of the 'fewest layers' board.

I really would like to have some sponsoring to build one of those boards and see if it works at all. The geometry of the placement alone is beyond me, but looking at functional blocks makes it even worse. 2 examples are a SMPS ( U6 bottom left) and the crystal for the microcontroller Y1-U5 (center upper-left). I really should give it another try without the connectors being locked, maybe that helps.