Initial submission to hackaday.io (which is the initial submission the internet). Githun projects still need to be posted, as does a tour of the posted materials, which will be maintained in the forthcoming youtube link. There will also be a link to more complete (even pedantic) documentation (nicluding explanations of the images submitted to this site, as well as resources that I am unable to properly organize here.

Status of the project....

I am presently awaiting the arrival of my first-run of the production-ready design. It will ship from Screaming Circuits on 2014.07.28, barring any unforseen problems. I believe the hardware to be complete.

One minor hardware bug was discovered prior to pick-and-place, and it was corrected in the design. It will be repairable, and is not critical to the core functionality of the glove.

There is one part (the super capacitor that is serving as a clock battery) that I might cut because of it's profile. According to my measurements in Blender, the wrist unit is going to be about 45mm long, by 35mm wide by 19mm deep. Choosing a smaller cap will let me cut the depth by an additional 4mm or so. It will be easy to rework that area of the prototype if needed. I also want to source a battery that is closer to being square. The proportions of the battery should be closer to those of the wrist PCB.

The CPLD turned out to really blow my expectations away. The baseline functionality is vetted and spec'd with 31% utilization. The IRDa subsystem is where I plan to devote most of the remaining die area. Because the CPLD so far exceeded my expectation, I am going to get features into revision 1 of the CPLD that I thought would have to be delayed until revision 2. The revision 1 plan required IMU selection to be done via GPIO combination from the CPU. This meant 6 pins devoted to the task, plus those needed for the vectored IRQ. 

The r2 plan doesn't need any of those pins because addressing is done entirely via SPI. Not only does this now give us the flexibility of having 6 more CPU pins free'd to talk to the CPLD for some other feature, but we can also now write our SPI driver that the IMU sits atop to be entirely DMA-driven.

Software side:
The only working code I have at the time of this writing is the code I used for proof-of-concept. But that was for a different CPU (A Teensy 3.1 in this case), and no CPLD. The code was meant to test the planned electrical layout of the IMUs, vette the calculations for system bandwidth, latency against actual measurement. New features were also added to the sensor abstraction layer which will be required to support 17 IMUs running at once and interrupting asyncronously.

Sensor framework code is ready and well-vetted, and IMU classes are operating sufficiently for the moment. I still need to re-org my filetree in SVN so that it makes more sense to navigate. Once that is done, I will upload the result to github and post the link

Drift-correction zones and mechanism are the design challenge I am most-eager to tackle, but I'm going to need to focus on driver classes initially.