Data for the display is stored in a small memory block 16 bytes deep and continuously refreshed.
To print data on the display we need to put the char in the memory that is done by   verilog UART module.

Demo: Running on the icebreaker board.

Tx and Rx line are physically connected to the FPGA pins:

set_io -nowarn RX          6
set_io -nowarn TX          9

Data path:

Timing diagram:

For the complete Verilog code, refer to the project repository: https://github.com/ADDTDR/HPDL-1414-Pmod-Module/tree/main/Software